Abstract
NVRAM is being considered as an additional memory/storage component of future computer systems. This paper investigates how much performance gain can be obtained if we add NVRAM as the memory/storage component of computer systems. Specifically, we present a storage system accelerator that utilizes a small size of NVRAM cache. To do so, we formally define the NVRAM caching problem and analyze the storage access patterns that can be exploited in managing NVRAM cache. Our analysis shows that there are more than 40% of single-write data in storage I/Os due to periodic flushes triggered from the host side. Based on this observation, we show that acceleration of storage performance can be maximized by using NVRAM as a selective storage cache device. Empirical evaluation results show that our storage architecture with flush-aware NVRAM cache reduces the total I/O time by 26% on average and up to 62% compared to the case that does not use our scheme.
Original language | English |
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Title of host publication | Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018 |
Editors | Shaozi Li, Ying Dai, Yun Cheng |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 107-111 |
Number of pages | 5 |
ISBN (Electronic) | 9781538655009 |
DOIs | |
State | Published - 2 Jul 2018 |
Event | 5th International Conference on Information Science and Control Engineering, ICISCE 2018 - Zhengzhou, Henan, China Duration: 20 Jul 2018 → 22 Jul 2018 |
Publication series
Name | Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018 |
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Conference
Conference | 5th International Conference on Information Science and Control Engineering, ICISCE 2018 |
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Country/Territory | China |
City | Zhengzhou, Henan |
Period | 20/07/18 → 22/07/18 |
Bibliographical note
Publisher Copyright:© 2018 IEEE.
Keywords
- I/O
- NVRAM
- storage accelerator
- storage cache
- storage system