Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics

Hyunkyoung Choi; Hyokyung Bahn

doi:10.1109/ICISCE.2018.00032

Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics

Hyunkyoung Choi, Hyokyung Bahn

Computer Science & Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

NVRAM is being considered as an additional memory/storage component of future computer systems. This paper investigates how much performance gain can be obtained if we add NVRAM as the memory/storage component of computer systems. Specifically, we present a storage system accelerator that utilizes a small size of NVRAM cache. To do so, we formally define the NVRAM caching problem and analyze the storage access patterns that can be exploited in managing NVRAM cache. Our analysis shows that there are more than 40% of single-write data in storage I/Os due to periodic flushes triggered from the host side. Based on this observation, we show that acceleration of storage performance can be maximized by using NVRAM as a selective storage cache device. Empirical evaluation results show that our storage architecture with flush-aware NVRAM cache reduces the total I/O time by 26% on average and up to 62% compared to the case that does not use our scheme.

Original language	English
Title of host publication	Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018
Editors	Yun Cheng, Shaozi Li, Ying Dai
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	107-111
Number of pages	5
ISBN (Electronic)	9781538655009
DOIs	https://doi.org/10.1109/ICISCE.2018.00032
State	Published - 14 Jan 2019
Event	5th International Conference on Information Science and Control Engineering, ICISCE 2018 - Zhengzhou, Henan, China Duration: 20 Jul 2018 → 22 Jul 2018

Publication series

Name	Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018

Conference

Conference	5th International Conference on Information Science and Control Engineering, ICISCE 2018
Country/Territory	China
City	Zhengzhou, Henan
Period	20/07/18 → 22/07/18

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported by the ICT R&D program of MSIP/IITP (2018-0-00549, Extremely Scalable Order-preserving Operating System for Manycore and Non-volatile Memory) and also by the Basic Science Research program through the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. 2016R1A2B4015750). Hyokyung Bahn is the corresponding author of this paper.

Publisher Copyright:
© 2018 IEEE.

Keywords

I/O
NVRAM
storage accelerator
storage cache
storage system

Access to Document

10.1109/ICISCE.2018.00032

Cite this

Choi, H., & Bahn, H. (2019). Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics. In Y. Cheng, S. Li, & Y. Dai (Eds.), Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018 (pp. 107-111). Article 8612530 (Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICISCE.2018.00032

Choi, Hyunkyoung ; Bahn, Hyokyung. / Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics. Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018. editor / Yun Cheng ; Shaozi Li ; Ying Dai. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 107-111 (Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018).

@inproceedings{af4e6bd4406b41e0976cd8c423b3e8b2,

title = "Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics",

abstract = "NVRAM is being considered as an additional memory/storage component of future computer systems. This paper investigates how much performance gain can be obtained if we add NVRAM as the memory/storage component of computer systems. Specifically, we present a storage system accelerator that utilizes a small size of NVRAM cache. To do so, we formally define the NVRAM caching problem and analyze the storage access patterns that can be exploited in managing NVRAM cache. Our analysis shows that there are more than 40% of single-write data in storage I/Os due to periodic flushes triggered from the host side. Based on this observation, we show that acceleration of storage performance can be maximized by using NVRAM as a selective storage cache device. Empirical evaluation results show that our storage architecture with flush-aware NVRAM cache reduces the total I/O time by 26% on average and up to 62% compared to the case that does not use our scheme.",

keywords = "I/O, NVRAM, storage accelerator, storage cache, storage system",

author = "Hyunkyoung Choi and Hyokyung Bahn",

note = "Funding Information: ACKNOWLEDGMENT This work was supported by the ICT R&D program of MSIP/IITP (2018-0-00549, Extremely Scalable Order-preserving Operating System for Manycore and Non-volatile Memory) and also by the Basic Science Research program through the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. 2016R1A2B4015750). Hyokyung Bahn is the corresponding author of this paper. Publisher Copyright: {\textcopyright} 2018 IEEE.; 5th International Conference on Information Science and Control Engineering, ICISCE 2018 ; Conference date: 20-07-2018 Through 22-07-2018",

year = "2019",

month = jan,

day = "14",

doi = "10.1109/ICISCE.2018.00032",

language = "English",

series = "Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "107--111",

editor = "Yun Cheng and Shaozi Li and Ying Dai",

booktitle = "Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018",

}

Choi, H & Bahn, H 2019, Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics. in Y Cheng, S Li & Y Dai (eds), Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018., 8612530, Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018, Institute of Electrical and Electronics Engineers Inc., pp. 107-111, 5th International Conference on Information Science and Control Engineering, ICISCE 2018, Zhengzhou, Henan, China, 20/07/18. https://doi.org/10.1109/ICISCE.2018.00032

Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics. / Choi, Hyunkyoung; Bahn, Hyokyung.
Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018. ed. / Yun Cheng; Shaozi Li; Ying Dai. Institute of Electrical and Electronics Engineers Inc., 2019. p. 107-111 8612530 (Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics

AU - Choi, Hyunkyoung

AU - Bahn, Hyokyung

N1 - Funding Information: ACKNOWLEDGMENT This work was supported by the ICT R&D program of MSIP/IITP (2018-0-00549, Extremely Scalable Order-preserving Operating System for Manycore and Non-volatile Memory) and also by the Basic Science Research program through the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. 2016R1A2B4015750). Hyokyung Bahn is the corresponding author of this paper. Publisher Copyright: © 2018 IEEE.

PY - 2019/1/14

Y1 - 2019/1/14

N2 - NVRAM is being considered as an additional memory/storage component of future computer systems. This paper investigates how much performance gain can be obtained if we add NVRAM as the memory/storage component of computer systems. Specifically, we present a storage system accelerator that utilizes a small size of NVRAM cache. To do so, we formally define the NVRAM caching problem and analyze the storage access patterns that can be exploited in managing NVRAM cache. Our analysis shows that there are more than 40% of single-write data in storage I/Os due to periodic flushes triggered from the host side. Based on this observation, we show that acceleration of storage performance can be maximized by using NVRAM as a selective storage cache device. Empirical evaluation results show that our storage architecture with flush-aware NVRAM cache reduces the total I/O time by 26% on average and up to 62% compared to the case that does not use our scheme.

AB - NVRAM is being considered as an additional memory/storage component of future computer systems. This paper investigates how much performance gain can be obtained if we add NVRAM as the memory/storage component of computer systems. Specifically, we present a storage system accelerator that utilizes a small size of NVRAM cache. To do so, we formally define the NVRAM caching problem and analyze the storage access patterns that can be exploited in managing NVRAM cache. Our analysis shows that there are more than 40% of single-write data in storage I/Os due to periodic flushes triggered from the host side. Based on this observation, we show that acceleration of storage performance can be maximized by using NVRAM as a selective storage cache device. Empirical evaluation results show that our storage architecture with flush-aware NVRAM cache reduces the total I/O time by 26% on average and up to 62% compared to the case that does not use our scheme.

KW - I/O

KW - NVRAM

KW - storage accelerator

KW - storage cache

KW - storage system

UR - http://www.scopus.com/inward/record.url?scp=85062068999&partnerID=8YFLogxK

U2 - 10.1109/ICISCE.2018.00032

DO - 10.1109/ICISCE.2018.00032

M3 - Conference contribution

AN - SCOPUS:85062068999

T3 - Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018

SP - 107

EP - 111

BT - Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018

A2 - Cheng, Yun

A2 - Li, Shaozi

A2 - Dai, Ying

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 5th International Conference on Information Science and Control Engineering, ICISCE 2018

Y2 - 20 July 2018 through 22 July 2018

ER -

Choi H, Bahn H. Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics. In Cheng Y, Li S, Dai Y, editors, Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018. Institute of Electrical and Electronics Engineers Inc. 2019. p. 107-111. 8612530. (Proceedings - 2018 5th International Conference on Information Science and Control Engineering, ICISCE 2018). doi: 10.1109/ICISCE.2018.00032

Accelerating Storage System Performances with NVRAM Cache by Considering Storage Access Characteristics

Abstract

Publication series

Conference

Bibliographical note

Keywords

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