Accelerating Storage Performance with NVRAM by Considering Application's I/O Characteristics

Jisun Kim, Hyokyung Bahn

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

In this paper, we present a storage performance accelerator that utilizes a small size of fast NVRAM along with HDD. To do so, we first characterize the storage access patterns for different application types, and make two prominent observations that can be exploited in managing NVRAM storage efficiently. The first observation is that a bulk of storage I/O does not happen on a single specific partition, but it is varied significantly for different application categories. Our second observation is that there are more than 40% of single access data in storage I/Os due to the existence of host-side buffer cache. Based on these observations, we show that acceleration of storage performance can be maximized by using NVRAM as a back-end storage partition (such as file system, journal area, or swap area) rather than using it as a cache device. Specifically, we propose an architecture that uses NVRAM as a swap, a journal, and a file system partitions, respectively, for graph visualization, database, and multimedia streaming applications. Empirical evaluation results show that our storage architecture with application-aware NVRAM allocation reduces the total I/O time by 24% on average and up to 52% compared to the case that uses NVRAM as a cache device.

Original languageEnglish
Title of host publicationProceedings - 2018 IEEE International Conference on Big Data and Smart Computing, BigComp 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages383-389
Number of pages7
ISBN (Electronic)9781538636497
DOIs
StatePublished - 25 May 2018
Event2018 IEEE International Conference on Big Data and Smart Computing, BigComp 2018 - Shanghai, China
Duration: 15 Jan 201818 Jan 2018

Publication series

NameProceedings - 2018 IEEE International Conference on Big Data and Smart Computing, BigComp 2018

Conference

Conference2018 IEEE International Conference on Big Data and Smart Computing, BigComp 2018
Country/TerritoryChina
CityShanghai
Period15/01/1818/01/18

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported by the Basic Science Research program through the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP) (No. 2016R1A2B4015750). Hyokyung Bahn is the corresponding author of this paper.

Publisher Copyright:
© 2018 IEEE.

Keywords

  • hybrid storage
  • I/O
  • NVRAM
  • storage cache
  • storage system

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