In order to overcome the limitation of a multibit siliconoxidenitrideoxidesilicon (SONOS) memory with multistorage nodes, we propose a unique 3-D vertical nor (U3VNOR) array architecture. The U3VNOR has a vertical channel so that it is possible to have a long enough channel without extra cell area. Therefore, we can avoid the problems such as redistribution of injected charges, second-bit effect, and short-channel effect. Also, it is the most integrated flash architecture having the smallest unit cell size, which is 1 F2/bit. In this paper, we present the fabrication method and the operation voltage scheme of the U3VNOR. In addition, through numerical simulation, we verify its program and erase characteristics. Due to its high density and reliable multibit operation, the U3VNOR is a promising structure for the future high-density nor flash memory.
Bibliographical noteFunding Information:
Manuscript received October 31, 2008; revised May 4, 2009. First published June 30, 2009; current version published January 8, 2010. This work was supported by Samsung Electronics under a project entitled “The research on structure and characteristics of the nonvolatile memory devices.” The review of this paper was arranged by Associate Editor S. D. Cotofana.
- 3-D array
- Flash memory
- Silicon-oxide-nitride-oxide-silicon (SONOS)
- Vertical channel