A unified-RAM (URAM) cell for multi-functioning capacitorless DRAM and NVM

Jin Woo Han; Seong Wan Ryu; Chungjin Kim; Sungho Kim; Maesoon Im; Jin Choi Sung; Soo Kim Jin; Hee Kim Kwang; Sung Lee Gi; Sub Oh Jae; Ho Song Myeong; Chang Park Yun; Woo Kim Jeoung; Yang Kyu Choi

doi:10.1109/IEDM.2007.4419104

A unified-RAM (URAM) cell for multi-functioning capacitorless DRAM and NVM

Jin Woo Han
, Seong Wan Ryu
, Chungjin Kim
, Sungho Kim
, Maesoon Im
, Jin Choi Sung
, Soo Kim Jin
, Hee Kim Kwang
, Sung Lee Gi
, Sub Oh Jae
, Ho Song Myeong
, Chang Park Yun
, Woo Kim Jeoung
, Yang Kyu Choi

Semiconductor Engineering

Research output: Contribution to journal › Conference article › peer-review

30 Scopus citations

Abstract

A novel partially-depleted (PD) SONOS FinFET is demonstrated for unified function of a high speed capacitorless 1T-DRAM and non-volatile memory (NVM). A floating body and O/N/O layer are combined in a single FinFET to provide multi-functional unified-RAM (URAM) operation. The fabricated URAM shows a V_T window of 3V with a retention time exceeding 10 years for NVM operation and a sensing margin of 9μA with a program/erase time of 10nsec for IT-DRAM operation in a single memory cell transistor.

Original language	English
Article number	4419104
Pages (from-to)	929-932
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting, IEDM
DOIs	https://doi.org/10.1109/IEDM.2007.4419104
State	Published - 2007
Event	2007 IEEE International Electron Devices Meeting, IEDM - Washington, DC, United States Duration: 10 Dec 2007 → 12 Dec 2007

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Han, J. W., Ryu, S. W., Kim, C., Kim, S., Im, M., Sung, J. C., Jin, S. K., Kwang, H. K., Gi, S. L., Jae, S. O., Myeong, H. S., Yun, C. P., Jeoung, W. K., & Choi, Y. K. (2007). A unified-RAM (URAM) cell for multi-functioning capacitorless DRAM and NVM. Technical Digest - International Electron Devices Meeting, IEDM, 929-932. Article 4419104. https://doi.org/10.1109/IEDM.2007.4419104

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title = "A unified-RAM (URAM) cell for multi-functioning capacitorless DRAM and NVM",

abstract = "A novel partially-depleted (PD) SONOS FinFET is demonstrated for unified function of a high speed capacitorless 1T-DRAM and non-volatile memory (NVM). A floating body and O/N/O layer are combined in a single FinFET to provide multi-functional unified-RAM (URAM) operation. The fabricated URAM shows a VT window of 3V with a retention time exceeding 10 years for NVM operation and a sensing margin of 9μA with a program/erase time of 10nsec for IT-DRAM operation in a single memory cell transistor.",

author = "Han, \{Jin Woo\} and Ryu, \{Seong Wan\} and Chungjin Kim and Sungho Kim and Maesoon Im and Sung, \{Jin Choi\} and Jin, \{Soo Kim\} and Kwang, \{Hee Kim\} and Gi, \{Sung Lee\} and Jae, \{Sub Oh\} and Myeong, \{Ho Song\} and Yun, \{Chang Park\} and Jeoung, \{Woo Kim\} and Choi, \{Yang Kyu\}",

year = "2007",

doi = "10.1109/IEDM.2007.4419104",

language = "English",

pages = "929--932",

journal = "Technical Digest - International Electron Devices Meeting, IEDM",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2007 IEEE International Electron Devices Meeting, IEDM ; Conference date: 10-12-2007 Through 12-12-2007",

}

TY - JOUR

T1 - A unified-RAM (URAM) cell for multi-functioning capacitorless DRAM and NVM

AU - Han, Jin Woo

AU - Ryu, Seong Wan

AU - Kim, Chungjin

AU - Kim, Sungho

AU - Im, Maesoon

AU - Sung, Jin Choi

AU - Jin, Soo Kim

AU - Kwang, Hee Kim

AU - Gi, Sung Lee

AU - Jae, Sub Oh

AU - Myeong, Ho Song

AU - Yun, Chang Park

AU - Jeoung, Woo Kim

AU - Choi, Yang Kyu

PY - 2007

Y1 - 2007

N2 - A novel partially-depleted (PD) SONOS FinFET is demonstrated for unified function of a high speed capacitorless 1T-DRAM and non-volatile memory (NVM). A floating body and O/N/O layer are combined in a single FinFET to provide multi-functional unified-RAM (URAM) operation. The fabricated URAM shows a VT window of 3V with a retention time exceeding 10 years for NVM operation and a sensing margin of 9μA with a program/erase time of 10nsec for IT-DRAM operation in a single memory cell transistor.

AB - A novel partially-depleted (PD) SONOS FinFET is demonstrated for unified function of a high speed capacitorless 1T-DRAM and non-volatile memory (NVM). A floating body and O/N/O layer are combined in a single FinFET to provide multi-functional unified-RAM (URAM) operation. The fabricated URAM shows a VT window of 3V with a retention time exceeding 10 years for NVM operation and a sensing margin of 9μA with a program/erase time of 10nsec for IT-DRAM operation in a single memory cell transistor.

UR - https://www.scopus.com/pages/publications/45749123479

U2 - 10.1109/IEDM.2007.4419104

DO - 10.1109/IEDM.2007.4419104

M3 - Conference article

AN - SCOPUS:45749123479

SN - 0163-1918

SP - 929

EP - 932

JO - Technical Digest - International Electron Devices Meeting, IEDM

JF - Technical Digest - International Electron Devices Meeting, IEDM

M1 - 4419104

T2 - 2007 IEEE International Electron Devices Meeting, IEDM

Y2 - 10 December 2007 through 12 December 2007

ER -

A unified-RAM (URAM) cell for multi-functioning capacitorless DRAM and NVM

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