A triple-level cell charge trap flash memory device with CVD-grown MoS2

  • Minkyung Kim
  • , Eunpyo Park
  • , Jongkil Park
  • , Jaewook Kim
  • , Yeon Joo Jeong
  • , Suyoun Lee
  • , Inho Kim
  • , Jong Keuk Park
  • , Sung Yun Park
  • , Joon Young Kwak

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

This study investigates the triple-level cell (TLC) memory retention of a MoS2-channel based charge trap flash (CTF) device. A top-gated CTF device with a high-κ gate dielectric is found to have a high coupling ratio, which enhances the tunneling efficiency for programming. The fabricated devices show the long memory retention performance for each state, demonstrating the feasibility of a robust TLC CTF memory device based on a CVD grown 2D material.

Original languageEnglish
Article number105620
JournalResults in Physics
Volume38
DOIs
StatePublished - Jul 2022

Bibliographical note

Publisher Copyright:
© 2022 The Author(s)

Keywords

  • Charge trap flash
  • MoS
  • Triple-level cell

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