TY - JOUR
T1 - A silicon-compatible synaptic transistor capable of multiple synaptic weights toward energy-efficient neuromorphic systems
AU - Yu, Eunseon
AU - Cho, Seongjae
AU - Park, Byung Gook
N1 - Funding Information:
Funding: This work was supported by Nano·Material Technology Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science and ICT (MSIT) (Grant No. NRF-2016M3A7B4910348) and by Mid-Career Researcher Program through NRF funded by the MSIT (Grant No. NRF-2017R1A2B2011570).
Funding Information:
This work was supported by Nano?Material Technology Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science and ICT (MSIT) (Grant No. NRF-2016M3A7B4910348) and by Mid-Career Researcher Program through NRF funded by the MSIT (Grant No. NRF-2017R1A2B2011570).
Publisher Copyright:
© 2019 by the authors. Licensee MDPI, Basel, Switzerland.
PY - 2019/10
Y1 - 2019/10
N2 - In order to resolve the issue of tremendous energy consumption in conventional artificial intelligence, hardware-based neuromorphic system is being actively studied. Although various synaptic devices for the system have been proposed, they have shown limits in terms of endurance, reliability, energy efficiency, and Si processing compatibility. In this work, we design a synaptic transistor with short-term and long-term plasticity, high density, high reliability and energy efficiency, and Si processing compatibility. The synaptic characteristics of the device are closely examined and validated through technology computer-aided design (TCAD) device simulation. Consequently, full synaptic functions with high energy efficiency have been realized.
AB - In order to resolve the issue of tremendous energy consumption in conventional artificial intelligence, hardware-based neuromorphic system is being actively studied. Although various synaptic devices for the system have been proposed, they have shown limits in terms of endurance, reliability, energy efficiency, and Si processing compatibility. In this work, we design a synaptic transistor with short-term and long-term plasticity, high density, high reliability and energy efficiency, and Si processing compatibility. The synaptic characteristics of the device are closely examined and validated through technology computer-aided design (TCAD) device simulation. Consequently, full synaptic functions with high energy efficiency have been realized.
KW - Energy consumption
KW - Hardware-based neuromorphic system
KW - Si processing compatibility
KW - Synaptic device
KW - TCAD device simulation
UR - http://www.scopus.com/inward/record.url?scp=85073514956&partnerID=8YFLogxK
U2 - 10.3390/electronics8101102
DO - 10.3390/electronics8101102
M3 - Article
AN - SCOPUS:85073514956
SN - 2079-9292
VL - 8
JO - Electronics (Switzerland)
JF - Electronics (Switzerland)
IS - 10
M1 - 1102
ER -
