A silicon-compatible synaptic transistor capable of multiple synaptic weights toward energy-efficient neuromorphic systems

In order to resolve the issue of tremendous energy consumption in conventional artificial intelligence, hardware-based neuromorphic system is being actively studied. Although various synaptic devices for the system have been proposed, they have shown limits in terms of endurance, reliability, energy efficiency, and Si processing compatibility. In this work, we design a synaptic transistor with short-term and long-term plasticity, high density, high reliability and energy efficiency, and Si processing compatibility. The synaptic characteristics of the device are closely examined and validated through technology computer-aided design (TCAD) device simulation. Consequently, full synaptic functions with high energy efficiency have been realized.