A serial-parallel architecture for two-dimensional Discrete Cosine and Inverse Discrete Cosine Transforms

Hyesook Lim, Vincenzo Piuri, Earl E. Swartzlander

Research output: Contribution to journalArticlepeer-review

28 Scopus citations

Abstract

The Discrete Cosine and Inverse Discrete Cosine Transforms are widely used tools in many digital signal and image processing applications. The complexity of these algorithms often requires dedicated hardware support to satisfy the performance requirements of hard real-time applications. This paper presents the architecture of an efficient implementation of a two-dimensional DCT/IDCT transform processor via a serial-parallel systolic array that does not require transposition.

Original languageEnglish
Pages (from-to)1297-1309
Number of pages13
JournalIEEE Transactions on Computers
Volume49
Issue number12
DOIs
StatePublished - 2000

Keywords

  • Application specific processor architecture
  • Discrete Cosine Transform
  • Image compression
  • Inverse Discrete Cosine Transform
  • Serial-parallel processor
  • Systolic array

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