A pentagonal 2D layered PdSe2-based synaptic device with a graphene floating gate

Eunpyo Park, Jae Eun Seo, Gichang Noh, Yooyeon Jo, Dong Yeon Woo, In Soo Kim, Jongkil Park, Jaewook Kim, Yeon Joo Jeong, Suyoun Lee, Inho Kim, Jong Keuk Park, Sangbum Kim, Jiwon Chang, Joon Young Kwak

Research output: Contribution to journalArticlepeer-review

10 Scopus citations

Abstract

Recently, two-dimensional (2D) materials have attracted great attention from researchers to overcome the limitations of conventional semiconductor materials. Specifically, 2D materials offer great advantages for low power consumption and robust endurance, which are required to achieve the key characteristics of non-volatile memory. Herein, we introduce a pentagonal 2D layered PdSe2 channel-based floating gate memory with a positive threshold voltage, which can potentially enable the device to be turned off around zero gate bias to reduce power consumption, and observe a multi-bit conductance state with reliable retention time. We demonstrated 64 levels of conductance states to mimic synaptic weight behaviors with only using positive voltage pulses. An artificial neural network emulation based on our device demonstrated a high handwritten digit recognition accuracy of ∼90%. In addition, one of the popular biological learning rules, spike-timing-dependent plasticity (STDP), was successfully realized in the device with identical triangular-shaped pulses by applying them separately. The experimental results from our device suggest promising potential for use in the field of non-volatile memory devices and in neuromorphic systems.

Original languageEnglish
Pages (from-to)16536-16545
Number of pages10
JournalJournal of Materials Chemistry C
Volume10
Issue number43
DOIs
StatePublished - 17 Oct 2022

Bibliographical note

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© 2022 The Royal Society of Chemistry.

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