Abstract
In this brief, an advanced sensing scheme for ultrathin-body vertical Flash memory device is introduced experimentally. Without an increment in the number of read operations, the program/erase states of a memory cell can be identified exactly even with the existence of electrical interference between cells having an ultrathin vertical channel in common. The novel sensing scheme, i.e., the double sensing per 2 bits method, was validated for a fabricated device with a channel thickness of 80 nm. The proposed method can be also used as reference for establishing a smart sensing scheme for multilevel cell nand Flash memory devices.
Original language | English |
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Article number | 5934398 |
Pages (from-to) | 2814-2817 |
Number of pages | 4 |
Journal | IEEE Transactions on Electron Devices |
Volume | 58 |
Issue number | 8 |
DOIs | |
State | Published - Aug 2011 |
Bibliographical note
Funding Information:Manuscript received March 2, 2011; revised April 28, 2011; accepted May 14, 2011. Date of publication June 27, 2011; date of current version July 22, 2011. This work was supported by the Ministry of Knowledge Economy of Korea under Project 10035320. The review of this brief was arranged by Editor D. Esseni.
Keywords
- Double sensing per 2 bits (DSTB)
- electrical interference
- multilevel cell (MLC)
- nand Flash memory device
- ultrathin body