A novel planarization technique for a high-Tc multilevel IC process

Amit P. Marathe, Theodore Van Duzer, Luke P. Lee

Research output: Contribution to journalArticlepeer-review

5 Scopus citations


A novel technique has been developed to planarize insulating layers which may be used in a YBa2Cu3O7-δ (YBCO) IC process. The technique, called complementary mask planarization (CoMP), has been successfully implemented to planarize line gratings etched in an SrTiO3 insulator. The average surface roughness of the line gratings as measured by an atomic force microscope (AFM) was reduced from 3000 to 250 Å after planarization. Films of YBCO were deposited and patterned in the form of narrow strips over the line gratings to simulate insulated crossovers in IC structures. The I-V characteristics of the YBCO strips over planarized line gratings showed that the critical current density is higher by two orders of magnitude than those over unplanarized gratings.

Original languageEnglish
Pages (from-to)3834-3839
Number of pages6
JournalIEEE Transactions on Applied Superconductivity
Issue number4
StatePublished - 1997

Bibliographical note

Funding Information:
Manuscript received August 5, 1997. This research was supported by NRL under contract N00014-93-K-2002 and ONR under Contract N00014-92-J-1835.


  • High-temperature superconductors
  • Integrated circuit fabrication
  • Planarization
  • Superconducting circuits


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