A major limitation of the lightly-doped-drain (LDD) type of structure at deep submicron (≤0.35 μm) dimensions is studied and a new structural approach for successfully achieving reliable and manufacturable MOSFETs for L≤0.35 μm is described. The newly reported limit on maximum junction depth and allowable grading of the doping profile of the N-region results from the need to avoid channel doping compensation in order to minimize unacceptable adverse charge-sharing effects. The proposed structural approach overcomes this limitation while suppressing adverse hot-carrier effects. The hot-carrier-suppressed (HCS) MOSFET structure has a lower doped N-region behind a very shallow, steeply profiled N+ source/drain junction. This structural approach should permit MOSFET devices to be more successfully scaled at deep submicron dimensions in terms of performance, reliability, and manufacturability combined.
|Number of pages
|Digest of Technical Papers - Symposium on VLSI Technology
|Published - 1990
|1990 Symposium on VLSI Technology - Honolulu, HI, United States
Duration: 4 Jun 1990 → 7 Jun 1990