Abstract
A 1.0 Gb/s 80 dBΩ fully-differential TIA uses 0.25 μm CMOS and multichip-on-oxide (MCO) process. MCO enables integration of PD, TIA, and planar inductors of Q=21.1 for shunt peaking on an oxidized silicon substrate. Interchannel crosstalk and power dissipation are <-40 dB and 27 mW, respectively. MCO and TIA chips are 5×5 mm2 and 0.7×1 mm22, respectively.
Original language | English |
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Pages (from-to) | 60-61+401 |
Journal | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
Issue number | SUPPL. |
State | Published - 2002 |
Event | 2002 IEEE International Solid-State Circuits Conference - San Francisco, CA, United States Duration: 3 Feb 2002 → 7 Feb 2002 |