TY - JOUR
T1 - A More Hardware-Oriented Spiking Neural Network Based on Leading Memory Technology and Its Application with Reinforcement Learning
AU - Kim, Min Hwi
AU - Hwang, Sungmin
AU - Bang, Suhyun
AU - Kim, Tae Hyeon
AU - Lee, Dong Keun
AU - Ansari, Md Hasan Raza
AU - Cho, Seongjae
AU - Park, Byung Gook
N1 - Funding Information:
Manuscript received June 2, 2021; revised July 17, 2021; accepted July 20, 2021. Date of publication August 4, 2021; date of current version August 23, 2021. This work was supported in part by the National Research Foundation of Korea (NRF) Grant funded by the Ministry of Science and ICT of Korea (MSIT) under Grant 2018R1A2A1A05023517 and in part by the Brain Korea (BK) 21 Four Program of the Education and Research Program for Future Information and Communications Technology (ICT) Pioneers, Seoul National University, in 2020. The review of this article was arranged by Editor P. Narayanan. (Corresponding authors: Byung-Gook Park; Seongjae Cho.) Min-Hwi Kim, Sungmin Hwang, Suhyun Bang, Tae-Hyeon Kim, Dong Keun Lee, and Byung-Gook Park are with the Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul 08826, Republic of Korea, and also with the Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, Republic of Korea (e-mail: bgpark@snu.ac.kr).
Publisher Copyright:
© 1963-2012 IEEE.
PY - 2021/9
Y1 - 2021/9
N2 - In recent days, more hardware-driven artificial intelligence system capable of brain-like low-energy consumption is gaining ever-increasing interest. The hardware-driven property lies in the low-power synaptic device and its array along with the area and energy-efficient neuron circuits. In this work, a spiking neural network (SNN) based on analog synaptic device of resistive-switching random access memory (RRAM) is constructed from the experimentally fabricated devices. Furthermore, the capability of the designed SNN hardware for sequential tasks through an optimal reinforcement learning (RL) algorithm is demonstrated. More specifically, the Rush Hour game is conducted as an example of applications for the sequential task for which an SNN architecture is plausibly suited. The rule of the game is simple but has not been demonstrated by a hardware-oriented artificial neural network (ANN) yet, and in this work, it is reported that the analog RRAM synaptic devices in the cross-point array architecture successfully solve the problem via the RL algorithm.
AB - In recent days, more hardware-driven artificial intelligence system capable of brain-like low-energy consumption is gaining ever-increasing interest. The hardware-driven property lies in the low-power synaptic device and its array along with the area and energy-efficient neuron circuits. In this work, a spiking neural network (SNN) based on analog synaptic device of resistive-switching random access memory (RRAM) is constructed from the experimentally fabricated devices. Furthermore, the capability of the designed SNN hardware for sequential tasks through an optimal reinforcement learning (RL) algorithm is demonstrated. More specifically, the Rush Hour game is conducted as an example of applications for the sequential task for which an SNN architecture is plausibly suited. The rule of the game is simple but has not been demonstrated by a hardware-oriented artificial neural network (ANN) yet, and in this work, it is reported that the analog RRAM synaptic devices in the cross-point array architecture successfully solve the problem via the RL algorithm.
KW - Artificial neural network (ANN)
KW - cross-point array architecture
KW - hardware-driven artificial intelligence
KW - low energy consumption
KW - reinforcement learning (RL)
KW - resistive-switching random access memory (RRAM)
KW - Rush Hour game
KW - sequential task
KW - spiking neural network (SNN)
KW - synaptic device
UR - http://www.scopus.com/inward/record.url?scp=85112593430&partnerID=8YFLogxK
U2 - 10.1109/TED.2021.3099769
DO - 10.1109/TED.2021.3099769
M3 - Article
AN - SCOPUS:85112593430
SN - 0018-9383
VL - 68
SP - 4411
EP - 4417
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 9
M1 - 9506994
ER -