A more accurate analytical DC compact modeling of tunneling field-effect transistor for SPICE simulation

Seoyeon Go, Won Jae Lee, Seongjae Cho

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

In this work, an analytical DC compact model of tunneling field-effect transistor (TFET) with higher accuracy is presented. Non-local band-to-band tunneling current equation in the device simulation equips density of states (DOS) and Fermi-Dirac distribution of carriers, and the electrical parameters are extracted from the device simulation and fed into the circuit-level simulation. All the equations with the full set of coefficients obtained from the device simulations are have been encoded by Verilog-A and implanted in the HSPICE. Along with the abrupt switching subthreshold and on-state current characteristics, ambipolar current characteristics in the negative gate bias region has been also precisely described in this work. The device and circuit simulation results have demonstrated plausibly good agreement and the developed model will be of great practical use in the digital and analog circuit designs.

Original languageEnglish
Pages (from-to)551-560
Number of pages10
JournalJournal of Semiconductor Technology and Science
Volume19
Issue number6
DOIs
StatePublished - Dec 2019

Bibliographical note

Publisher Copyright:
© 2019, Institute of Electronics Engineers of Korea. All rights reserved.

Keywords

  • Circuit design
  • Circuit simulation
  • DC compact model
  • Device simulation
  • Device-circuit co-optimization
  • HSPICE
  • TFET

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