TY - GEN
T1 - A lifespan-aware reliability scheme for RAID-based flash storage
AU - Lee, Sehwan
AU - Lee, Bitna
AU - Koh, Kern
AU - Bahn, Hyokyung
PY - 2011
Y1 - 2011
N2 - Due to the ever-growing capacity of flash memory along with its good properties such as low-power consumption and high performance, flash-based SSDs (solid state disks) are anticipated to be used in the storage of high-end server systems. However, the reliability problem of flash devices is becoming increasingly serious. The number of P/E (program/erase) cycles allowed to each flash block is too small, especially less than 10,000 for MLC (multi-level cell) flash memory. Furthermore, the bit error rate of flash memory becomes rapidly high as the number of P/E cycles increases. To relieve these problems, we present a lifespan-aware reliability scheme, which adopts RAID technologies together with ECCs (error correction codes). First, our scheme dynamically manages the size of striping group to cope with the increasing error rates of flash memory as the number of P/E cycles increases. Second, we use a device-aware log block mapping scheme, which uses different reliability policies for data blocks and log blocks by taking advantage of the characteristics of each block type. Third, we use small amount of storage class memory (SCM) to save parity blocks temporarily. By absorbing frequent updates of parity into SCM, we can extend the lifespan of flash memory. Simulation experiments show that our scheme obtains high reliability with minimum space overhead as well as improved I/O performances compared to traditional RAID-5.
AB - Due to the ever-growing capacity of flash memory along with its good properties such as low-power consumption and high performance, flash-based SSDs (solid state disks) are anticipated to be used in the storage of high-end server systems. However, the reliability problem of flash devices is becoming increasingly serious. The number of P/E (program/erase) cycles allowed to each flash block is too small, especially less than 10,000 for MLC (multi-level cell) flash memory. Furthermore, the bit error rate of flash memory becomes rapidly high as the number of P/E cycles increases. To relieve these problems, we present a lifespan-aware reliability scheme, which adopts RAID technologies together with ECCs (error correction codes). First, our scheme dynamically manages the size of striping group to cope with the increasing error rates of flash memory as the number of P/E cycles increases. Second, we use a device-aware log block mapping scheme, which uses different reliability policies for data blocks and log blocks by taking advantage of the characteristics of each block type. Third, we use small amount of storage class memory (SCM) to save parity blocks temporarily. By absorbing frequent updates of parity into SCM, we can extend the lifespan of flash memory. Simulation experiments show that our scheme obtains high reliability with minimum space overhead as well as improved I/O performances compared to traditional RAID-5.
KW - FTL (flash translation layer)
KW - NAND flash memory
KW - RAID
KW - reliability
KW - SSD (solid state drive)
UR - http://www.scopus.com/inward/record.url?scp=79959321669&partnerID=8YFLogxK
U2 - 10.1145/1982185.1982266
DO - 10.1145/1982185.1982266
M3 - Conference contribution
AN - SCOPUS:79959321669
SN - 9781450301138
T3 - Proceedings of the ACM Symposium on Applied Computing
SP - 374
EP - 379
BT - 26th Annual ACM Symposium on Applied Computing, SAC 2011
T2 - 26th Annual ACM Symposium on Applied Computing, SAC 2011
Y2 - 21 March 2011 through 24 March 2011
ER -