TY - GEN
T1 - A Highly Scalable and Energy-Efficient 1T DRAM Embedding a SiGe Quantum Well Structure for Significant Retention Enhancement
AU - Yu, Eunseon
AU - Cho, Seongjae
N1 - Funding Information:
This work was supported by the Ministry of Trade, Industry and Energy (MOTIE) and Korea Semiconductor Research Consortium support program for the development of future semiconductor devices (Grant No. 10080513 and 10052928).
Publisher Copyright:
© 2018 IEEE.
PY - 2018/11/28
Y1 - 2018/11/28
N2 - In this study, a capacitorless one-transistor dynamic random-access memory (1T DRAM) featuring a novel structure with SiGe quantum well (QW) is proposed and characterized by rigorous simulation. It is demonstrated that the ultra-thin vertical channel and SiGe QW greatly improve device scalability and data retention. In write operation, band-to-band tunneling is applied for faster write speed, higher device scalability, and stronger temperature tolerance. Moreover, the SiGe QW at the drain side generates an increased amount of holes at lower operation voltage and enhances the retention time by constructing a more effective hole storage. As the results, the proposed SiGe QW 1T DRAM showed sub-10-ns fast write and erase times and a long retention time reaching up to 1.12 s.
AB - In this study, a capacitorless one-transistor dynamic random-access memory (1T DRAM) featuring a novel structure with SiGe quantum well (QW) is proposed and characterized by rigorous simulation. It is demonstrated that the ultra-thin vertical channel and SiGe QW greatly improve device scalability and data retention. In write operation, band-to-band tunneling is applied for faster write speed, higher device scalability, and stronger temperature tolerance. Moreover, the SiGe QW at the drain side generates an increased amount of holes at lower operation voltage and enhances the retention time by constructing a more effective hole storage. As the results, the proposed SiGe QW 1T DRAM showed sub-10-ns fast write and erase times and a long retention time reaching up to 1.12 s.
KW - 1T DRAM
KW - band-to-band tunneling
KW - capacitorless DRAM
KW - enhanced retention time
KW - SiGe quantum well (QW)
KW - SiGe QW 1T DRAM
KW - sub-10-ns write and erase
UR - http://www.scopus.com/inward/record.url?scp=85059733908&partnerID=8YFLogxK
U2 - 10.1109/SISPAD.2018.8551621
DO - 10.1109/SISPAD.2018.8551621
M3 - Conference contribution
AN - SCOPUS:85059733908
T3 - International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
SP - 255
EP - 257
BT - SISPAD 2018 - 2018 International Conference on Simulation of Semiconductor Processes and Devices, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2018
Y2 - 24 September 2018 through 26 September 2018
ER -