A dual-feedback folded-cascode fully differential transimpedance amplifier in 65-nm CMOS

This paper presents a fully differential transimpedance amplifier (TIA) realized in a standard 65-nm CMOS technology, which exploits a novel dual-feedback folded-cascode input configuration for high transimpedance gain and low input impedance characteristics, and employs active single-to-differential (ASD) circuit particularly for fully differential signaling even from the input stage. Simulated results of the proposed dual-feedback folded-cascode differential (DFD) TIA show 67-dBΩ transimpedance gain, 330-MHz bandwidth for 1.6-pF photodiode capacitance,-77.2-dB power supply rejection ratio at 100 kHz,-26-dBm sensitivity, and 3.38-mW power consumption from a single 1.2-V supply.