A digital hearing aid SoC based on AHB-lite bus matrix

Research output: Contribution to journalArticlepeer-review

Abstract

This work presents the SoC (System-on-a-Chip) for the digital hearing aid of which market size is expected to increase hugely. The proposed SoC employs the powerful custom DSP (Digital Signal Processor), which has the scalable architecture for high throughput applications, and various peripheral IPs such as I2S, Timer, and GPIO. All blocks including SRAMs are connected with multi-layer bus matrix based on AMBA AHB-Lite which allows the short latency in transactions. The proposed chip has been fabricated with 65nm CMOS process with 128KB embedded SRAM.

Original languageEnglish
JournalAdvanced Science Letters
Volume22
Issue number11
DOIs
StatePublished - Nov 2016

Bibliographical note

Funding Information:
This study was supported by the Research Program funded by the Seoul National University of Science and Technology.

Publisher Copyright:
© 2016, American Scientific Publishers. All rights reserved.

Keywords

  • AMBA
  • Digital hearing aid
  • DSP (Digital Signal Processor)
  • SoC (System-on-a-Chip)

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