A Cryptographic Transistor with Stochastic Carrier Trapping and Detrapping for a True Random Number Generator

A cryptographic transistor called a cryptosistor, based on CMOS technology, is demonstrated as a true random number generator (tRNG). It exploits stochastic carrier trapping and detrapping at a deliberately destabilized interface between the gate oxide and silicon channel. Three entropy sources contribute to randomness: impact ionization-generated carriers, jittered out-diffusion carriers, and carriers affected by trapping/detrapping. To enhance carrier variation, a low-quality tetraethyl orthosilicate (TEOS) oxide deposited by chemical vapor deposition is used as the gate dielectric instead of conventional high-quality thermal oxide. Although TEOS is typically used as a stable interlayer dielectric, here a thin TEOS layer with unstable interface properties is intentionally employed to introduce randomness. This approach highlights the use of TEOS as a functional material, aiming to preserve the long-established advantages of CMOS technology, rather than pursuing entirely different materials. The cryptosistor’s irregular voltage output is digitized by a compact, low-power ADC, and the resulting bits pass the NIST SP 800-22 randomness test. As a standard transistor component, the cryptosistor can be easily integrated into chips without additional fabrication steps, offering enhanced security for device-to-chip, chip-to-chip, and chip-to-system communication in hyper-connected environments.