A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors

Ying He; Sung Min Park

doi:10.3390/s22020554

A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors

Ying He, Sung Min Park

Electronic and Electrical Engineering

Research output: Contribution to journal › Article › peer-review

4 Scopus citations

Abstract

This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors. The proposed I-TDC exploits a clock-free configuration so as to discard clock-related dynamic power consumption and some notorious issues such as skew, glitch, and synchronization. It consists of a one-dimensional (1D) flash TDC to generate coarse-control codes and an integrator with a peak detection and hold (PDH) circuit to produce fine-control codes. A thermometer-to-binary converter is added to the 1D flash TDC, yielding four-bit coarse codes so that the measured detection range can be represented by nine-bit digital codes in total. Test chips of the proposed I-TDC demonstrate the measured results of the 53 dB dynamic range, i.e., the maximum detection range of 33.6 m and the minimum range of 7.5 cm. The chip core occupies the area of 0.14 × 1.4 mm², with the power dissipation of 1.6 mW from a single 1.2-V supply.

Original language	English
Article number	554
Journal	Sensors (Switzerland)
Volume	22
Issue number	2
DOIs	https://doi.org/10.3390/s22020554
State	Published - 1 Jan 2022

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP; no. 2020R1A2C1008879). This work was supported by the National Research Foundation (NRF), Korea, under project BK21 FOUR. Acknowledgments: The EDA tool and the chip fabrication were supported by the IC Design Educa-tion Center.

Funding Information:
Funding: This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP; no. 2020R1A2C1008879). This work was supported by the National Research Foundation (NRF), Korea, under project BK21 FOUR.

Funding Information:
Acknowledgments: The EDA tool and the chip fabrication were supported by the IC Design Education Center.

Publisher Copyright:
© 2022 by the authors. Licensee MDPI, Basel, Switzerland.

Keywords

CMOS
Integrator
LiDAR
PDH
Sensor
TDC

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10.3390/s22020554

Cite this

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title = "A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors",

abstract = "This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors. The proposed I-TDC exploits a clock-free configuration so as to discard clock-related dynamic power consumption and some notorious issues such as skew, glitch, and synchronization. It consists of a one-dimensional (1D) flash TDC to generate coarse-control codes and an integrator with a peak detection and hold (PDH) circuit to produce fine-control codes. A thermometer-to-binary converter is added to the 1D flash TDC, yielding four-bit coarse codes so that the measured detection range can be represented by nine-bit digital codes in total. Test chips of the proposed I-TDC demonstrate the measured results of the 53 dB dynamic range, i.e., the maximum detection range of 33.6 m and the minimum range of 7.5 cm. The chip core occupies the area of 0.14 × 1.4 mm2, with the power dissipation of 1.6 mW from a single 1.2-V supply.",

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author = "Ying He and Park, {Sung Min}",

note = "Funding Information: This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP; no. 2020R1A2C1008879). This work was supported by the National Research Foundation (NRF), Korea, under project BK21 FOUR. Acknowledgments: The EDA tool and the chip fabrication were supported by the IC Design Educa-tion Center. Funding Information: Funding: This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP; no. 2020R1A2C1008879). This work was supported by the National Research Foundation (NRF), Korea, under project BK21 FOUR. Funding Information: Acknowledgments: The EDA tool and the chip fabrication were supported by the IC Design Education Center. Publisher Copyright: {\textcopyright} 2022 by the authors. Licensee MDPI, Basel, Switzerland.",

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N2 - This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors. The proposed I-TDC exploits a clock-free configuration so as to discard clock-related dynamic power consumption and some notorious issues such as skew, glitch, and synchronization. It consists of a one-dimensional (1D) flash TDC to generate coarse-control codes and an integrator with a peak detection and hold (PDH) circuit to produce fine-control codes. A thermometer-to-binary converter is added to the 1D flash TDC, yielding four-bit coarse codes so that the measured detection range can be represented by nine-bit digital codes in total. Test chips of the proposed I-TDC demonstrate the measured results of the 53 dB dynamic range, i.e., the maximum detection range of 33.6 m and the minimum range of 7.5 cm. The chip core occupies the area of 0.14 × 1.4 mm2, with the power dissipation of 1.6 mW from a single 1.2-V supply.

AB - This paper presents a nine-bit integrator-based time-to-digital converter (I-TDC) realized in a 180 nm CMOS technology for the applications of indoor home-monitoring light detection and ranging (LiDAR) sensors. The proposed I-TDC exploits a clock-free configuration so as to discard clock-related dynamic power consumption and some notorious issues such as skew, glitch, and synchronization. It consists of a one-dimensional (1D) flash TDC to generate coarse-control codes and an integrator with a peak detection and hold (PDH) circuit to produce fine-control codes. A thermometer-to-binary converter is added to the 1D flash TDC, yielding four-bit coarse codes so that the measured detection range can be represented by nine-bit digital codes in total. Test chips of the proposed I-TDC demonstrate the measured results of the 53 dB dynamic range, i.e., the maximum detection range of 33.6 m and the minimum range of 7.5 cm. The chip core occupies the area of 0.14 × 1.4 mm2, with the power dissipation of 1.6 mW from a single 1.2-V supply.

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ER -

A CMOS Integrator-Based Clock-Free Time-to-Digital Converter for Home-Monitoring LiDAR Sensors

Abstract

Bibliographical note

Keywords

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