A bulk FinFET unified-RAM (URAM) cell for multifunctioning NVM and capacitorless 1T-DRAM

Jin Woo Han; Seong Wan Ryu; Sungho Kim; Chung Jin Kim; Jae Hyuk Ahn; Sung Jin Choi; Jin Soo Kim; Kwang Hee Kim; Gi Sung Lee; Jae Sub Oh; Myeong Ho Song; Yun Chang Park; Jeoung Woo Kim; Yang Kyu Choi

doi:10.1109/LED.2008.922142

A bulk FinFET unified-RAM (URAM) cell for multifunctioning NVM and capacitorless 1T-DRAM

Jin Woo Han, Seong Wan Ryu, Sungho Kim, Chung Jin Kim, Jae Hyuk Ahn, Sung Jin Choi, Jin Soo Kim, Kwang Hee Kim, Gi Sung Lee, Jae Sub Oh, Myeong Ho Song, Yun Chang Park, Jeoung Woo Kim, Yang Kyu Choi

Semiconductor Engineering

Research output: Contribution to journal › Article › peer-review

29 Scopus citations

Abstract

A bulk FinFET-based unified-RAM (URAM) cell technology is demonstrated for the fusion of a nonvolatile-memory (NVM) and capacitorless 1T-DRAM. An oxide/nitride/oxide layer and a floating-body are combined to perform a URAM operation in a single transistor. A buried n-well technology for NMOS allows hole accumulation for the 1T-DRAM operation in a p-type bulk substrate. The bulk FinFET URAM offers a cost-effective and fully compatible process with a conventional FinFET SONOS, and it also expedites heat dissipation. Highly reliable NVM and high-speed 1T-DRAM operation are confirmed, and it was also verified that there is no disturbance between the two memory functions.

Original language	English
Pages (from-to)	632-634
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	29
Issue number	6
DOIs	https://doi.org/10.1109/LED.2008.922142
State	Published - Jun 2008

Keywords

1T-DRAM
Bulk FinFET
Capacitorless DRAM
FinFET
Nonvolatile memory (NVM)
SONOS
Unified-RAM (URAM)

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10.1109/LED.2008.922142

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title = "A bulk FinFET unified-RAM (URAM) cell for multifunctioning NVM and capacitorless 1T-DRAM",

abstract = "A bulk FinFET-based unified-RAM (URAM) cell technology is demonstrated for the fusion of a nonvolatile-memory (NVM) and capacitorless 1T-DRAM. An oxide/nitride/oxide layer and a floating-body are combined to perform a URAM operation in a single transistor. A buried n-well technology for NMOS allows hole accumulation for the 1T-DRAM operation in a p-type bulk substrate. The bulk FinFET URAM offers a cost-effective and fully compatible process with a conventional FinFET SONOS, and it also expedites heat dissipation. Highly reliable NVM and high-speed 1T-DRAM operation are confirmed, and it was also verified that there is no disturbance between the two memory functions.",

keywords = "1T-DRAM, Bulk FinFET, Capacitorless DRAM, FinFET, Nonvolatile memory (NVM), SONOS, Unified-RAM (URAM)",

author = "Han, {Jin Woo} and Ryu, {Seong Wan} and Sungho Kim and Kim, {Chung Jin} and Ahn, {Jae Hyuk} and Choi, {Sung Jin} and Kim, {Jin Soo} and Kim, {Kwang Hee} and Lee, {Gi Sung} and Oh, {Jae Sub} and Song, {Myeong Ho} and Park, {Yun Chang} and Kim, {Jeoung Woo} and Choi, {Yang Kyu}",

year = "2008",

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doi = "10.1109/LED.2008.922142",

language = "English",

volume = "29",

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AU - Han, Jin Woo

AU - Ryu, Seong Wan

AU - Kim, Sungho

AU - Kim, Chung Jin

AU - Ahn, Jae Hyuk

AU - Choi, Sung Jin

AU - Kim, Jin Soo

AU - Kim, Kwang Hee

AU - Lee, Gi Sung

AU - Oh, Jae Sub

AU - Song, Myeong Ho

AU - Park, Yun Chang

AU - Kim, Jeoung Woo

AU - Choi, Yang Kyu

PY - 2008/6

Y1 - 2008/6

N2 - A bulk FinFET-based unified-RAM (URAM) cell technology is demonstrated for the fusion of a nonvolatile-memory (NVM) and capacitorless 1T-DRAM. An oxide/nitride/oxide layer and a floating-body are combined to perform a URAM operation in a single transistor. A buried n-well technology for NMOS allows hole accumulation for the 1T-DRAM operation in a p-type bulk substrate. The bulk FinFET URAM offers a cost-effective and fully compatible process with a conventional FinFET SONOS, and it also expedites heat dissipation. Highly reliable NVM and high-speed 1T-DRAM operation are confirmed, and it was also verified that there is no disturbance between the two memory functions.

AB - A bulk FinFET-based unified-RAM (URAM) cell technology is demonstrated for the fusion of a nonvolatile-memory (NVM) and capacitorless 1T-DRAM. An oxide/nitride/oxide layer and a floating-body are combined to perform a URAM operation in a single transistor. A buried n-well technology for NMOS allows hole accumulation for the 1T-DRAM operation in a p-type bulk substrate. The bulk FinFET URAM offers a cost-effective and fully compatible process with a conventional FinFET SONOS, and it also expedites heat dissipation. Highly reliable NVM and high-speed 1T-DRAM operation are confirmed, and it was also verified that there is no disturbance between the two memory functions.

KW - 1T-DRAM

KW - Bulk FinFET

KW - Capacitorless DRAM

KW - FinFET

KW - Nonvolatile memory (NVM)

KW - SONOS

KW - Unified-RAM (URAM)

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JO - IEEE Electron Device Letters

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ER -

A bulk FinFET unified-RAM (URAM) cell for multifunctioning NVM and capacitorless 1T-DRAM

Abstract

Keywords

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