A 5 Gb/s Optoelectronic Receiver IC in 180 nm CMOS for Short-Distance Optical Interconnects

Yunji Song, Sung Min Park

Research output: Contribution to journalArticlepeer-review

Abstract

This paper presents a CMOS-based optoelectronic receiver integrated circuit (CORIC) realized in a standard 180 nm CMOS technology for the applications of short-distance optical interconnects. The CORIC comprises a spatially modulated P+/N-well on-chip avalanche photodiode (P+/NW APD) for optical-to-electrical conversion, a dummy APD at the differential input for enhanced common-mode noise rejection, a cross-coupled differential transimpedance amplifier (CCD-TIA) for current-to-voltage conversion, a 3-bit continuous-time linear equalizer (CTLE) for adaptive equalization by using NMOS registers, and a (Formula presented.) -doubler output buffer (OB). The CTLE and (Formula presented.) -doubler OB combination not only compensates the frequency-dependent signal loss, but also provides symmetric differential output signals. Post-layout simulations of the proposed CORIC reveal a transimpedance gain of 53.2 dBΩ, a bandwidth of 4.83 GHz even with a 490 fF parasitic capacitance from the on-chip P+/NW APD, a dynamic range of 60 dB that handles the input photocurrents from 1 μApp to 1 mApp, and a DC power consumption of 33.7 mW from a 1.8 V supply. The CORIC chip core occupies an area of 260 × 101 μm2.

Original languageEnglish
Article number624
JournalPhotonics
Volume12
Issue number6
DOIs
StatePublished - Jun 2025

Bibliographical note

Publisher Copyright:
© 2025 by the authors.

Keywords

  • APD
  • CTLE
  • f-doubler
  • optoelectronic
  • TIA

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