In this paper, a four-channel 12.5-Gb/s differential transimpedance amplifier (TIA) array is realized in a 0.18-μm standard CMOS technology for the applications of digital visual interface (DVI) and high-definition multimedia interface (HDMI) cables. By exploiting the common-gate configuration as input stage, the TIA relaxes the design tradeoffs between the bandwidth and the large photodiode capacitance. Post-layout simulations demonstrate that a single channel TIA achieves 64-dBΩ transimpedance gain, 3.125-Gb/s operations with 2.1-GHz bandwidth for 2-pF input parasitic capacitance including photodiode capacitance and ESD protection pad capacitance, and 1.52-μA average input noise current that corresponds to -18dBm sensitivity for 10 -12 BER The 4-channel TIA array consumes 200-mW from a single 1.8-V supply.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - 2007|
|Event||2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States|
Duration: 27 May 2007 → 30 May 2007