A 4-channel 12.5Gb/s common-gate transimpedance amplifier array for DVI/HDMI applications

K. Park; W. S. Oh; B. Y. Choi; J. W. Han; S. M. Park

doi:10.1109/iscas.2007.378609

A 4-channel 12.5Gb/s common-gate transimpedance amplifier array for DVI/HDMI applications

K. Park, W. S. Oh, B. Y. Choi, J. W. Han, S. M. Park

Electronic and Electrical Engineering

Research output: Contribution to journal › Conference article › peer-review

22 Scopus citations

Abstract

In this paper, a four-channel 12.5-Gb/s differential transimpedance amplifier (TIA) array is realized in a 0.18-μm standard CMOS technology for the applications of digital visual interface (DVI) and high-definition multimedia interface (HDMI) cables. By exploiting the common-gate configuration as input stage, the TIA relaxes the design tradeoffs between the bandwidth and the large photodiode capacitance. Post-layout simulations demonstrate that a single channel TIA achieves 64-dBΩ transimpedance gain, 3.125-Gb/s operations with 2.1-GHz bandwidth for 2-pF input parasitic capacitance including photodiode capacitance and ESD protection pad capacitance, and 1.52-μA average input noise current that corresponds to -18dBm sensitivity for 10 ^-12 BER The 4-channel TIA array consumes 200-mW from a single 1.8-V supply.

Original language	English
Article number	4253107
Pages (from-to)	2192-2195
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
DOIs	https://doi.org/10.1109/iscas.2007.378609
State	Published - 2007
Event	2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States Duration: 27 May 2007 → 30 May 2007

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title = "A 4-channel 12.5Gb/s common-gate transimpedance amplifier array for DVI/HDMI applications",

abstract = "In this paper, a four-channel 12.5-Gb/s differential transimpedance amplifier (TIA) array is realized in a 0.18-μm standard CMOS technology for the applications of digital visual interface (DVI) and high-definition multimedia interface (HDMI) cables. By exploiting the common-gate configuration as input stage, the TIA relaxes the design tradeoffs between the bandwidth and the large photodiode capacitance. Post-layout simulations demonstrate that a single channel TIA achieves 64-dBΩ transimpedance gain, 3.125-Gb/s operations with 2.1-GHz bandwidth for 2-pF input parasitic capacitance including photodiode capacitance and ESD protection pad capacitance, and 1.52-μA average input noise current that corresponds to -18dBm sensitivity for 10 -12 BER The 4-channel TIA array consumes 200-mW from a single 1.8-V supply.",

author = "K. Park and Oh, {W. S.} and Choi, {B. Y.} and Han, {J. W.} and Park, {S. M.}",

year = "2007",

doi = "10.1109/iscas.2007.378609",

language = "English",

pages = "2192--2195",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 ; Conference date: 27-05-2007 Through 30-05-2007",

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T1 - A 4-channel 12.5Gb/s common-gate transimpedance amplifier array for DVI/HDMI applications

AU - Park, K.

AU - Oh, W. S.

AU - Choi, B. Y.

AU - Han, J. W.

AU - Park, S. M.

PY - 2007

Y1 - 2007

N2 - In this paper, a four-channel 12.5-Gb/s differential transimpedance amplifier (TIA) array is realized in a 0.18-μm standard CMOS technology for the applications of digital visual interface (DVI) and high-definition multimedia interface (HDMI) cables. By exploiting the common-gate configuration as input stage, the TIA relaxes the design tradeoffs between the bandwidth and the large photodiode capacitance. Post-layout simulations demonstrate that a single channel TIA achieves 64-dBΩ transimpedance gain, 3.125-Gb/s operations with 2.1-GHz bandwidth for 2-pF input parasitic capacitance including photodiode capacitance and ESD protection pad capacitance, and 1.52-μA average input noise current that corresponds to -18dBm sensitivity for 10 -12 BER The 4-channel TIA array consumes 200-mW from a single 1.8-V supply.

AB - In this paper, a four-channel 12.5-Gb/s differential transimpedance amplifier (TIA) array is realized in a 0.18-μm standard CMOS technology for the applications of digital visual interface (DVI) and high-definition multimedia interface (HDMI) cables. By exploiting the common-gate configuration as input stage, the TIA relaxes the design tradeoffs between the bandwidth and the large photodiode capacitance. Post-layout simulations demonstrate that a single channel TIA achieves 64-dBΩ transimpedance gain, 3.125-Gb/s operations with 2.1-GHz bandwidth for 2-pF input parasitic capacitance including photodiode capacitance and ESD protection pad capacitance, and 1.52-μA average input noise current that corresponds to -18dBm sensitivity for 10 -12 BER The 4-channel TIA array consumes 200-mW from a single 1.8-V supply.

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JO - Proceedings - IEEE International Symposium on Circuits and Systems

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T2 - 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007

Y2 - 27 May 2007 through 30 May 2007

ER -

A 4-channel 12.5Gb/s common-gate transimpedance amplifier array for DVI/HDMI applications

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