Abstract
In this paper, a 2-stage low noise amplifier (LNA) is implemented in a 90 nm CMOS technology for 2.4 GHz applications. The measurement results show a noise figure of 3.2 dB with a gain 19.9 dB. The circuit consumes 6 mA from a 1.2 V supply, and has 7.2 mW power consumption. The core size is 1.1 mm × 0.95 mm and the chip size including pads is 1.34 mm × 1 mm.
Original language | English |
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Pages (from-to) | 3228-3231 |
Number of pages | 4 |
Journal | Advanced Science Letters |
Volume | 22 |
Issue number | 11 |
DOIs | |
State | Published - Nov 2016 |
Bibliographical note
Publisher Copyright:© 2016 American Scientific Publishers. All rights reserved.
Keywords
- 2.4 GHz
- CMOS
- LNA