This paper describes the design of a 1.25-Gb/s CMOS burst-mode optical receiver IC for Giga-bit PON (Passive Optical Network) applications. By using the automatic level restoration scheme proposed in this paper, the burst-mode packet data can be processed with wide dynamic range and low extinction ratio specifications. The chip is fabricated in a 0.25-μm 1P5M CMOS technology and power dissipation is 425mW for a single-supply voltage of 2.5V.
|Journal||Midwest Symposium on Circuits and Systems|
|State||Published - 2004|
|Event||The 2004 47th Midwest Symposium on Circuits and Systems - Conference Proceedings - Hiroshima, Japan|
Duration: 25 Jul 2004 → 28 Jul 2004