70nm DRAM technology for DDR-3 application

Hyungtak Kim; Sangho Kim; Sungsam Lee; Sungho Jang; Ji Hoon Kim; Yangsoo Sung; Junwoong Park; Saehan Kwon; Sangmin Jun; Wontae Park; Daehan Han; Changhyun Cho; Yungi Kim; Kinam Kim; Byungil Ryu

doi:10.1016/j.physc.2005.03.020

70nm DRAM technology for DDR-3 application

Hyungtak Kim, Sangho Kim, Sungsam Lee, Sungho Jang, Ji Hoon Kim, Yangsoo Sung, Junwoong Park, Saehan Kwon, Sangmin Jun, Wontae Park, Daehan Han, Changhyun Cho, Yungi Kim, Kinam Kim, Byungil Ryu

Electronic and Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

For the first time, we developed 70nm DRAM technology applicable to a manufacturing level. This technology is aimed at DDR-3 application, which requires low-voltage operation and high speed performance. Fully working 70nm DRAMs were realized combining W-gate dual poly process, Recess-Channel-Array- Transistors (RCATs), and MIM cell capacitor module. In this paper, we present performance of 70nm node DRAMs which qualifies DDR-3 application requirement.

Original language	English
Title of host publication	2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers
Pages	29-30
Number of pages	2
DOIs	https://doi.org/10.1016/j.physc.2005.03.020
State	Published - 2005
Event	2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH - Hsinchu, Taiwan, Province of China Duration: 25 Apr 2005 → 27 Apr 2005

Publication series

Name	2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers

Conference

Conference	2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	25/04/05 → 27/04/05

Access to Document

10.1016/j.physc.2005.03.020

Cite this

Kim, H., Kim, S., Lee, S., Jang, S., Kim, J. H., Sung, Y., Park, J., Kwon, S., Jun, S., Park, W., Han, D., Cho, C., Kim, Y., Kim, K., & Ryu, B. (2005). 70nm DRAM technology for DDR-3 application. In 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers (pp. 29-30). Article T21 (2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers). https://doi.org/10.1016/j.physc.2005.03.020

@inproceedings{3339538f8aea442289d396a3ffde7c77,

title = "70nm DRAM technology for DDR-3 application",

abstract = "For the first time, we developed 70nm DRAM technology applicable to a manufacturing level. This technology is aimed at DDR-3 application, which requires low-voltage operation and high speed performance. Fully working 70nm DRAMs were realized combining W-gate dual poly process, Recess-Channel-Array- Transistors (RCATs), and MIM cell capacitor module. In this paper, we present performance of 70nm node DRAMs which qualifies DDR-3 application requirement.",

author = "Hyungtak Kim and Sangho Kim and Sungsam Lee and Sungho Jang and Kim, {Ji Hoon} and Yangsoo Sung and Junwoong Park and Saehan Kwon and Sangmin Jun and Wontae Park and Daehan Han and Changhyun Cho and Yungi Kim and Kinam Kim and Byungil Ryu",

year = "2005",

doi = "10.1016/j.physc.2005.03.020",

language = "English",

isbn = "078039058X",

series = "2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers",

pages = "29--30",

booktitle = "2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers",

note = "2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH ; Conference date: 25-04-2005 Through 27-04-2005",

}

Kim, H, Kim, S, Lee, S, Jang, S, Kim, JH, Sung, Y, Park, J, Kwon, S, Jun, S, Park, W, Han, D, Cho, C, Kim, Y, Kim, K & Ryu, B 2005, 70nm DRAM technology for DDR-3 application. in 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers., T21, 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers, pp. 29-30, 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Hsinchu, Taiwan, Province of China, 25/04/05. https://doi.org/10.1016/j.physc.2005.03.020

70nm DRAM technology for DDR-3 application. / Kim, Hyungtak; Kim, Sangho; Lee, Sungsam et al.
2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers. 2005. p. 29-30 T21 (2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - 70nm DRAM technology for DDR-3 application

AU - Kim, Hyungtak

AU - Kim, Sangho

AU - Lee, Sungsam

AU - Jang, Sungho

AU - Kim, Ji Hoon

AU - Sung, Yangsoo

AU - Park, Junwoong

AU - Kwon, Saehan

AU - Jun, Sangmin

AU - Park, Wontae

AU - Han, Daehan

AU - Cho, Changhyun

AU - Kim, Yungi

AU - Kim, Kinam

AU - Ryu, Byungil

PY - 2005

Y1 - 2005

N2 - For the first time, we developed 70nm DRAM technology applicable to a manufacturing level. This technology is aimed at DDR-3 application, which requires low-voltage operation and high speed performance. Fully working 70nm DRAMs were realized combining W-gate dual poly process, Recess-Channel-Array- Transistors (RCATs), and MIM cell capacitor module. In this paper, we present performance of 70nm node DRAMs which qualifies DDR-3 application requirement.

AB - For the first time, we developed 70nm DRAM technology applicable to a manufacturing level. This technology is aimed at DDR-3 application, which requires low-voltage operation and high speed performance. Fully working 70nm DRAMs were realized combining W-gate dual poly process, Recess-Channel-Array- Transistors (RCATs), and MIM cell capacitor module. In this paper, we present performance of 70nm node DRAMs which qualifies DDR-3 application requirement.

UR - http://www.scopus.com/inward/record.url?scp=27144483857&partnerID=8YFLogxK

U2 - 10.1016/j.physc.2005.03.020

DO - 10.1016/j.physc.2005.03.020

M3 - Conference contribution

AN - SCOPUS:27144483857

SN - 078039058X

SN - 9780780390584

T3 - 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers

SP - 29

EP - 30

BT - 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers

T2 - 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH

Y2 - 25 April 2005 through 27 April 2005

ER -

Kim H, Kim S, Lee S, Jang S, Kim JH, Sung Y et al. 70nm DRAM technology for DDR-3 application. In 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers. 2005. p. 29-30. T21. (2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers). doi: 10.1016/j.physc.2005.03.020

70nm DRAM technology for DDR-3 application

Abstract

Publication series

Conference

Access to Document

Fingerprint

Cite this