1.25-Gb/s regulated cascode CMOS transimpedance amplifier for gigabit ethernet applications

Sung Min Park, Hoi Jun Yoo

Research output: Contribution to journalArticlepeer-review

303 Scopus citations


A transimpedance amplifier (TIA) has been realized in a 0.6-μm digital CMOS technology for Gigabit Ethernet applications. The amplifier exploits the regulated cascode (RGC) configuration as the input stage, thus achieving as large effective input transconductance as that of Si Bipolar or GaAs MESFET. The RGC input configuration isolates the input parasitic capacitance including photodiode capacitance from the bandwidth determination better than common-gate TIA. Test chips were electrically measured on a FR-4 PC board, demonstrating transimpedance gain of 58 dBΩ and -3-dB bandwidth of 950 MHz for 0.5-pF photodiode capacitance. Even with 1-pF photodiode capacitance, the measured bandwidth exhibits only 90-MHz difference, confirming the mechanism of the RGC configuration. In addition, the noise measurements show average noise current spectral density of 6.3 pA/√Hz and sensitivity of -20-dBm for a bit-error rate of 10-12. The chip core dissipates 85 mW from a single 5-V supply.

Original languageEnglish
Pages (from-to)112-121
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Issue number1
StatePublished - Jan 2004


  • CMOS
  • Gigabit ethernet
  • Optical receiver
  • Regulated cascode (RGC)
  • Transimpedance amplifier


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