TY - JOUR
T1 - 1-Gb/s 80-dBΩ fully differential CMOS transimpedance amplifier in multichip on oxide technology for optical interconnects
AU - Park, Sung Min
AU - Lee, Jaeseo
AU - Yoo, Hoi Jun
PY - 2004/6
Y1 - 2004/6
N2 - A 1-Gb/s differential transimpedance amplifier (TIA) is realized in a 0.25-μm standard CMOS technology, incorporating the regulated cascode input configuration. The TIA chip is then integrated with a p-i-n photodiode on an oxidized phosphorous-silicon (OPS) substrate by employing the multi-chip-on-oxide (MCO) technology. The MCO TIA demonstrates 80-dBΩ transimpedance gain, 670-MHz bandwidth for 1-pF photodiode capacitance, 0.54-μA average input noise current, - 17-dBm sensitivity for 10 -12 bit-error rate (BER), and 27-mW power dissipation from a single 2.5-V supply. It also shows negligible switching noise effect from an embedded VCO on the OPS substrate. Furthermore, a four-channel MCO TIA array is implemented for optical interconnects, resulting in less than - 40-dB crosstalk between adjacent channels.
AB - A 1-Gb/s differential transimpedance amplifier (TIA) is realized in a 0.25-μm standard CMOS technology, incorporating the regulated cascode input configuration. The TIA chip is then integrated with a p-i-n photodiode on an oxidized phosphorous-silicon (OPS) substrate by employing the multi-chip-on-oxide (MCO) technology. The MCO TIA demonstrates 80-dBΩ transimpedance gain, 670-MHz bandwidth for 1-pF photodiode capacitance, 0.54-μA average input noise current, - 17-dBm sensitivity for 10 -12 bit-error rate (BER), and 27-mW power dissipation from a single 2.5-V supply. It also shows negligible switching noise effect from an embedded VCO on the OPS substrate. Furthermore, a four-channel MCO TIA array is implemented for optical interconnects, resulting in less than - 40-dB crosstalk between adjacent channels.
KW - Multichip-on-oxide (MCO)
KW - Optical interconnects
KW - Oxidized phosphorous-silicon (OPS)
KW - Regulated cascode
KW - Switching noise
KW - Transimpedance amplifier (TIA)
UR - http://www.scopus.com/inward/record.url?scp=2942689655&partnerID=8YFLogxK
U2 - 10.1109/JSSC.2004.827795
DO - 10.1109/JSSC.2004.827795
M3 - Article
AN - SCOPUS:2942689655
SN - 0018-9200
VL - 39
SP - 971
EP - 974
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 6
ER -